Meta’s AI Chips: Every MTIA Generation, From a 2020 Design to a Chip Every Six Months

Iris due to enter production Reported

Reuters reported in July that Meta planned to start manufacturing a custom AI chip code-named Iris in September 2026. According to the memo, the chip cleared six weeks of testing without a major issue, and Meta intends to release a new chip roughly every six months through 2027 as part of a plan to double its data-centre capacity from about 7 gigawatts to 14 gigawatts in 2027.

What is not confirmed: Meta has not said publicly which MTIA number Iris is, and as of 5 October 2026 has made no announcement that volume production has begun.

MTIA 300 and 400 detailed at Hot Chips Milestone

At the Hot Chips conference Meta engineers give the first technical detail on the new generation. MTIA 300 has 72 processing elements, 16 messaging elements and 216 GB of HBM3e, with a 3 nm compute die and a 5 nm I/O die; Meta says it matches GPUs on recommendation-model training at a competitive total cost of ownership.

MTIA 400 pairs two compute chiplets with eight HBM3e stacks (288 GB, roughly 9 TB/s) and about 12 petaflops of FP4. Meta calls it the first MTIA with raw performance competitive with leading commercial products. Seventy-two chips form one scale-up domain in a rack of 18 compute blades.

Capex guided to $130–145 billion

Meta narrows its 2026 capital-expenditure outlook to $130 billion to $145 billion, citing higher component prices and data-centre costs for future capacity. Second-quarter capex alone is about $31 billion. Every MTIA rack that replaces a GPU rack for a given job is meant to lower that bill over time.

AWS Graviton: tens of millions of CPU cores Milestone

Meta signs a deal with Amazon Web Services to bring tens of millions of Graviton5 cores into its compute portfolio for CPU-heavy agentic-AI work such as orchestration, retrieval and code execution. Meta described agentic AI as becoming almost as big a CPU story as a GPU story.

Broadcom: multi-gigawatt MTIA partnership Milestone

Meta and Broadcom extend their partnership to co-develop multiple MTIA generations through 2029, covering chip design, advanced packaging and Ethernet networking for AI clusters. The initial commitment is more than 1 gigawatt of custom silicon, described as the first phase of a multi-gigawatt rollout, and includes what the companies call the industry’s first 2 nm AI accelerator. Broadcom CEO Hock Tan leaves Meta’s board, where he had sat since 2024, to become an adviser on chip strategy.

KernelEvolve: AI that tunes the chips’ code

Meta describes KernelEvolve, an AI agent that searches for faster low-level kernels across its mixed hardware. It reports a 60%+ inference-throughput gain on the Andromeda ads model running on Nvidia GPUs, and a 25%+ training-throughput gain for an ads model on MTIA. For a custom chip that has no public CUDA-style ecosystem, automated kernel writing is a way to close the software gap faster.

Arm’s first chip, with Meta as first customer

Arm unveils the AGI CPU, the first data-centre processor it makes itself rather than licensing, and names Meta as co-developer and first customer on a multi-generation roadmap. The CPU sits beside accelerators in AI racks, handling the general-purpose work around them.

Four MTIA chips in two years Milestone

Meta publishes a roadmap of four generations: MTIA 300 (in production, ranking and recommendation training), MTIA 400 (lab testing done, 400% more FP8 compute than 300, 72-chip scale-up domain), MTIA 450 (twice the HBM bandwidth of 400, GenAI inference, mass deployment early 2027) and MTIA 500 (another 50% bandwidth, up to 80% more HBM capacity, 2027). From 300 to 500, Meta says HBM bandwidth rises 4.5 times and compute 25 times.

It also renames its first two chips MTIA 100 and MTIA 200 and says hundreds of thousands of MTIA chips are in production. Modular chiplets let it ship a new generation roughly every six months.

Olympus training chip dropped Reported

The Information reports that Meta has scrapped Olympus, its most advanced in-house AI training chip, after design problems; later reports tie it to the team from Rivos. In the same weeks Meta is reported to have agreed a multibillion-dollar deal to rent Google TPUs. Broadcom’s Hock Tan responds that the MTIA roadmap is ‘alive and well’. Meta’s March roadmap shifts the emphasis to inference.

Millions of Nvidia GPUs, 6 GW of AMD Milestone

On 17 February Meta signs a multiyear, multigenerational deal with Nvidia for millions of Blackwell and Rubin GPUs, Spectrum-X Ethernet and the first large Grace-only CPU deployment, with Vera CPUs possible from 2027. On 24 February AMD announces a 6-gigawatt agreement, starting with a custom MI450-based GPU in the second half of 2026; AMD gives Meta a performance-based warrant for up to 160 million shares.

Why it matters: these deals dwarf MTIA in near-term volume. They are the clearest sign that Meta’s chips are one part of a portfolio, not a replacement.

Meta agrees to buy Rivos

Meta agrees to acquire Rivos, a start-up building RISC-V based AI accelerators, to deepen its chip-design bench. Rivos had been reported in talks to raise money at a $2 billion valuation; Meta did not disclose terms.

First in-house training chip in test Reported

Reuters reports that Meta has begun a small deployment of its first in-house training chip, made by TSMC after a successful tape-out, with plans to scale up if tests go well and to use in-house chips for training from 2026. It is the line of work that leads to MTIA 300.

Next-generation MTIA (MTIA 200) Shipped

Meta unveils its second chip. It moves to TSMC 5 nm, runs at 1.35 GHz in 90 watts, and has 256 MB of on-chip SRAM and 128 GB of LPDDR5. Dense compute is 3.5 times v1 and sparse compute 7 times; Meta says it ‘more than doubles the compute and memory bandwidth’ of the previous solution and shows 3x the performance on four key recommendation models. It is already serving production models in 16 data-centre regions, 72 chips to a rack.

‘Almost 600,000 H100 equivalents’

Mark Zuckerberg says Meta will have about 350,000 Nvidia H100 GPUs by the end of 2024, and compute equal to almost 600,000 H100s counting other hardware. While MTIA serves recommendations, generative-AI training runs on Nvidia.

MTIA v1 announced (now MTIA 100) Shipped

At its AI Infra @Scale event Meta reveals MTIA v1, an inference accelerator for its deep-learning recommendation models, designed from 2020. It is a 7 nm chip with a grid of 64 processing elements built on RISC-V cores, 128 MB of on-chip SRAM and 64 GB of LPDDR5, delivering 102.4 TOPS at INT8 in 25 watts. Meta says it beats GPUs on performance per watt for low- and medium-complexity models. The same day it shows MSVP, an in-house video-transcoding chip, and a new AI-optimised data-centre design.

An earlier inference chip is scrapped Scrapped

According to Reuters, Meta abandons a planned rollout of an in-house inference chip after it underperforms in a small test, and orders billions of dollars of Nvidia GPUs instead. Moving from CPU-heavy servers to GPUs forces Meta to pause and redesign data centres for far more networking and liquid cooling. The setback is the background to MTIA’s cautious first target: recommendation inference only.

MTIA design begins

Meta’s silicon team starts designing a custom ASIC for its recommendation models, which by then account for a large share of its AI compute and run poorly on general CPUs. Meta later calls it the start of MTIA.

Big Sur: open AI server hardware

Facebook unveils Big Sur, an AI training server holding eight GPU cards, built with Nvidia’s Tesla M40 in mind, and contributes the design to the Open Compute Project it founded in 2011. It is Meta’s first public AI-hardware design; the chips inside are Nvidia’s.